1. Filed of the Invention
The present invention relates to a method of manufacturing a silicon-germanium heterojunction bipolar transistor (SiGe HBT) and a structure thereof, and more particularly, to a method of forming a base layer including silicon-germanium by epitaxial growth and a structure of the SiGe HBT in a heterojunction bipolar transistor used as a high-speed device.
2. Description of the Prior Art
Presently, due to continuous research and development in the field of electronics and telecommunications, optical transmission at a transmission rate of 10 Gbps or more is practicable using a high-speed device of 60 GHz class or more. In near feature, it is expected that a 20-30 Gbps IC for the optical transmission will be developed using the high-speed device of 100 GHz and an optical transmission system of few hundred Gbps class will be commercialized. Thus, an era of personal telecommunication using moving images will be opened soon. In the field of a radio communication terminal such as a personal mobile communication and GPS (global positioning system) terminal, it is essentially required to be much thinner, lighter, and, as the same time, multi-functionalized with lower power consumption. Therefore, RF (radio frequency) components, which have a problem in their size due to a large occupancy rate, should be formed into an IC. By a development of hybrid IC technology and MMIC (monolithic microwave integrated circuit) technology, the RF components may be formed into the IC, and the quality of the terminal and system is improved.
As one of the silicon bipolar devices, the SiGe HBT in which silicon-germanium is used as a base layer has a high operating speed of 100 GHz or more, and is in the limelight as an advanced high-speed device. The SiGe HBT device employs almost all the existing silicon process as it is and forms the base layer having a thin thickness of 0.02 m with the silicon-germanium using the epitaxial growth. Since the base layer (about 0.02 m) to be thinner than that of a conventional junction transistor is formed by the epitaxial growth using the silicon-germanium having a smaller band gap than silicon, there is some advantage to obtain a high current gain and operating speed with lower power consumption.
In the existing silicon bipolar device technology, Siemens and Daimler-Benz in Germany and IBM and HP in US have mainly developed. Meanwhile, in research and development of the SiGe HBT, IBM, Daimler-Benz, and NEC and so forth has mainly developed. A conventional method of manufacturing the SiGe HBT and structure thereof is as follows. FIG. 1 shows a cross-sectional view of a conventional heterojunction transistor defining a collector area by LOCOS (local oxidation of silicon) method.
Ion-implanting an n type dopant in a pxe2x88x92 type silicon substrate 1 forms a buried collector 11. Depositing nxe2x88x92 type silicon on an entire face of the substrate, in which the buried collector is formed, forms a collector thin film. On of the collector thin film, an anti-oxidising dielectric film as a mask covers a collector area and a collector sinker area. Then, the silicon exposed through the mask is locally oxidised by the LOCOS method to form a collector dielectric film 17. Therefore, on a portion of the buried collector 11, the collector thin film except the collector area and the collector sinker area is formed into the collector dielectric film (field oxide film) 17 formed of oxide silicon. An nxe2x88x92 type dopant is implanted in the collector sinker area and then heat-treated at a high temperature to form a collector sinker 13. A silicon-germanium thin film for forming the base grows on the entire face of the substrate and then is patterned except the collector 15 and a portion of the collector dielectric film 17 around the collector 15 so as to form a base thin film. Formed on the collector 15 is a monocrystal base 25. The base 25 is extended laterally on the collector dielectric film 17. The base 25 on the collector dielectric film 17 is formed into a polycrystalline or amorphous base semiconductor electrode 23. On the entire face, there is deposited silicon oxide or silicon nitride to form an emitter dielectric film 37. The emitter dielectric film 37 is patterned so as to be opened a portion thereof corresponding to an active area of the base (25), thereby defining an emitter area. On the entire surface of the substrate, there is formed an emitter semiconductor electrode 39 formed of a polycrystalline silicon containing the nxe2x88x92 type dopant such as arsenic and phosphorus, and so forth. Then, the emitter semiconductor electrode 39 is heat-treated to diffuse the nxe2x88x92 type dopant on the base thin film and thus form an emitter 35. The silicon oxide or the silicon nitride is deposited on the entire surface of the substrate to form a passivation film 77. The passivation film 77 is patterned to form a contact window for exposing the emitter semiconductor electrode 39. Further, the passivation film 77 and the emitter dielectric film 37 are patterned to form the contact windows for exposing the base semiconductor electrode 23 and the collector sinker 13. Finally, a metal layer is deposited and then patterned to form a base terminal 81 contacted through the contact window with the base semiconductor electrode 23, an emitter terminal 83 contacted through the contact window with the emitter semiconductor electrode 39 and a collector terminal contacted through the contact window with the collector sinker 13 (FIG. 1).
In the LOCOS method as described above, between the collector dielectric film containing the silicon oxide and the collector area containing the nxe2x88x92 type impurity, there is formed a clean boundary surface without any crystal defect. However, during the local oxidation of a part of the silicon layer, there is formed a bird""s beak at a side of the boundary surface. The bird""s beak is an obstacle to reducing a size of the device. Further, when the silicon-germanium thin film grows on the substrate of the silicon oxide film (collector dielectric film) and the silicon (collector), there is a problem that the silicon-germanium thin film selectively grows on only the silicon portion of the substrate.
In order to solve the problem, there is provided a selective epitaxial growth (SEG) method for manufacturing a high density and microminiature heterojunction transistor. FIG. 2 shows a cross-sectional view of a structure of a SiGe HBT manufactured by the SEG method. The manufacturing method will be described more fully.
Ion-implanting an n-type dopant in a p-type silicon substrate 1 forms a buried collector 11. Formed on an entire surface of the substrate, on which the buried collector is formed, is a collector dielectric film 17 of silicon oxide. After defining a part of the collector dielectric film 17, some portions of the collector dielectric film 17 corresponding to a collector area and a collector sinker area are removed so as to expose a portion of the buried collector 11. A pattern shape of the removed collector dielectric film 17 is formed to have a vertical sidewall. The collector area and the collector sinker area formed on a surface of the monocrystal buried collector exposed through the removed portion of the collector dielectric film 17 are filled with the monocrystal silicon by the SEG method. At this time, the monocrystal silicon excessively grows in the form of a mushroom to be higher than the collector dielectric film 17. Then, a protruded portion of the grown monocrystal silicon is removed by a chemical-mechanical polishing (CMP) method to flat the surface of the substrate. On the substrate on which a collector 15 and a collector sinker 13 are formed to have a vertical sidewall and a flat surface, silicon-germanium grows to form a base thin film. At this time, monocrystal silicon-germanium grows on the monocrystal silicon, i.e. the collector 15 to form a base 25 making a junction with the collector 15. Meanwhile, on the collector dielectric film 17 formed of the silicon oxide, polycrystalline or amorphous silicon-germanium grows. Formed on the base thin film is a base ohmic electrode layer 29 of a metal material in order to reduce a contact resistance. A portion of the base ohmic electrode layer 29 corresponding to the base 25 is removed to expose the base 25. And in order to prevent the base ohmic electrode layer 29 from being electrically contacted with an emitter to be formed, silicon oxide or silicon nitride is deposited on the emitter dielectric film 37. Then, the emitter dielectric film 37, the base ohmic electrode layer 29 and the base thin film are pattered to define the base 25, the base semiconductor electrode 23 and the base ohmic electrode layer 29. At this time, the collector sinker 13 is exposed. Preferably, on outer sides of the emitter dielectric film 37, the base ohmic electrode 29 and the base thin film etched by the patterning process, there is formed a sidewall dielectric film 97. The emitter dielectric film 37 is patterned so that a portion thereof corresponding to a center portion of the base 25 is removed to expose the base 25. Then, polycrystalline silicon containing an impurity is deposited and patterned to from an emitter semiconductor electrode 39 contacted with the exposed base 25 and a collector semiconductor electrode 19 contacted with the collector sinker 13. By a heat treatment process, the impurity in the emitter semiconductor electrode 39 is diffused to an upper portion of the base 25 to form an emitter 35. The silicon oxide or the silicon nitride is deposed on the entire surface of the substrate to form a passivation film 77. The passivation film 77 is patterned to form a contact window for exposing the emitter semiconductor electrode 39. And, the passivation film 77 and the emitter dielectric film 37 are patterned to form a contact window for exposing the base ohmic electrode 29. By sputtering a metal, there are formed a base terminal 81 contacted with the base ohmic electrode 29, an emitter terminal 83 contacted with the emitter semiconductor electrode 39 and a collector terminal 85 contacted with the collector semiconductor electrode.
In the conventional fabricating method described above, there is a problem in the selective epitaxial growth method for forming the collector 15 and the collector sinker 13. When the monocrystal silicon grows in a well-shaped space having the vertical sidewall formed by the etching process, a boundary surface with the silicon oxide sidewall has a very rough crystal structure. At the boundary surface between the collector 15 and the collector dielectric film 17, there is formed a defective area through which a carrier is freely passed. As a result, leakage current is generated from the base to the collector area, thereby lowering a quality of a product.
Further, in the conventional method such as the LOCOS method and the epitaxial growth method, when forming the base thin film, there is a problem that a thickness of the base thin film is not formed to be uniform. The base thin film is formed on the collector and the collector dielectric film by the epitaxial growth. On the surface of the substrate on which the crystal growth is performed, there are distributed mainly the silicon oxide and intermittently the monocrystal silicon. In this situation, if the base thin film grows, it is difficult to uniformly form the thickness of the thin film, the distribution content of the germanium and the concentration of the impurity due to loading effect.
Accordingly, it is an object of the present invention to provide a heterojunction transistor in which the problems inherent in the conventional transistor manufactured by the selective epitaxial growth method proper to reducing of a scale are solved, thereby providing a high operation speed and a high quality of a product, and a manufacturing method thereof.
It is other object of the present invention to provide a method of manufacturing a bipolar device by the heterojunction using the silicon-germanium as a base layer or the homojunction using the silicon as the base layer, which prevents a leakage current between the collector and the base by a defect at a boundary surface between the dielectric film and the collector inherent in the selective epitaxial growth method, and a structure of the transistor fabricated by the method.
It is another object of the present invention to provide a fabricating method for reducing the loading effect generated when a semiconductor material containing the SiGe grows on a surface containing the silicon and the dielectric film to form a base layer, and a structure of the transistor fabricated by the method.
According to the present invention, there is provided a method of manufacturing a bipolar device, comprising steps of forming a collector on a substrate including a buried collector to be contacted with the buried collector and protruded in the form of an island; depositing a collector dielectric film on the substrate on which the collector is formed; removing a protruded portion of the collector dielectric film covering the substrate; depositing a first semiconductor electrode layer on the substrate including the collector protruded over the collector dielectric film and flatting a surface of the first semiconductor electrode to expose only the collector formed of a semiconductor material and the first semiconductor electrode; and growing a base thin film including one of silicon and silicon-germanium on the substrate on which only the semiconductor material is exposed.
According to the present invention, there is also provided a bipolar device, comprising a substrate including a buried collector; a collector contacted with the buried collector and protruded in the form of an island; a collector dielectric film extended to a side portion of the collector and formed on the substrate; a first base semiconductor electrode extended to the side portion of the collector to have the same flat surface as an upper surface of the collector and formed on the collector dielectric film; a base including one of silicon-germanium and silicon formed on the collector; and a second base semiconductor electrode extended to a side portion of the base and formed on the first base semiconductor electrode to include one of the silicon-germanium and the silicon.